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mp5013 e 5 v , 2a , programmable current - limit switch with over - voltage clamp and s lew r ate control in a tsot23 - 8 mp5013 e rev. 1.0 www.monolithicpower.com 1 9/26/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. al l rights reserved. description the MP5013E is a protection device designed to protect circuitry on the output ( source ) from transients on the input ( v cc ) . it also p rotects the input from un wanted shorts and t ransients coming from the source . a small capacitor on d v / d t controls the slew rate that limit s the inrush current at the source . an internal circuit in dv/dt allows it to be float ed (no connect ion ) and still receive 1 . 2 m s of ramp time at the sourc e. the max imum load at the source is current - limited using sense fet topology. an external resistor between i - limit and s ource controls the magnitude of the current limit. an internal charge pump drives the gate of the power devic e, allowing the dmos power fet to have a very low on resistance of only 36 m ? . the MP5013E protects the source from the input being t oo low or too high. under - v oltage l ock o ut (uvlo) en sures that the input remains above the minimum operating threshold before the power device turn s on. if the input rises above the high ou tput threshold, the MP5013E limits the source voltage . features ? 3 v to 5.5 v operating input range ? 2a dc , 5a peak current ? 5.7 v t ypical output over - voltage clamp ? 22v absolute maximum v oltage ? input under - voltage lock out (uvlo) ? low inru sh current during start - up ? integrated 36 m? power fet ? enable/fault pin ? adjustable output voltage slew rate ? adjustable current limit ? thermal shutdown protection ? available in a tsot23 - 8 package applications ? storage (hdds, ssds) ? hot - swap systems ? set - t op boxes ? usb ports/hubs ? gaming typical application all mps parts are lead - free, halogen - free, and adhere to the rohs directive. for mps green status, please visit mps website under quality assurance. mps and the future of analog ic technology are registere d t rademarks of monolithic power systems, inc. v c c e n a b l e / f a u l t d v / d t g n d i - l i m i t s o u r c e v i n e n f 1 0 f s o u r c e 1 0 v c c v o u t c o u t c i n r l i m i t 2 2 ? m p 5 0 1 3 e
mp5013 e C 5 v, 2 a , programmable current - limit switch mp5013 e rev. 1.0 www.monolithicpower.com 2 9/26/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. al l rights reserved. ordering information part number* package top marking MP5013Egj tsot23 - 8 see below * for tape & reel, add suffix C z ( e.g. mp 5013 e g j C z) top marking a w b : product code of mp 5013e gj y: year code package reference tsot23 - 8 absolute maximum rat ings (1) v cc , source, i - l imit .................... - 0.3v to 22 v d v / dt , e nable /f ault ........................ - 0.3v to 6 v storage temperature ................ - 65c to +15 5 c junction temperature .............................. +150 c lead temperature ................................ ... +260 c continuous power dissipation (t a = +25 c) (2) ................................ ............................... . 1.25 w recommended operating conditions ( 3 ) in put volta ge operating ra nge .......... 3 v to 5.5 v current cap a bility ............................. 2a /5a peak (100% duty cycle, and < 1 s response time) operating junction temp . (t j ) ... - 40 c to +125 c thermal resistance ( 4 ) ja jc tsot23 - 8 ............................ 100 ...... 55 ... c/w not es : 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max) , the junction - to - ambient thermal resistance ? ja , and the ambient temperature t a , the maximum allowable po wer dissipation at any ambient temperature is calculated using: p d (max)=(t j (max) - t a )/ ? ja . exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. inter nal thermal shutdown circuitry protects the device from permanent damage. reduce 0. 1 w for every 10 o c ambient temperature increas e . 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51 - 7 4 - layer board . 8 7 6 5 4 3 2 1 t o p v i e w i - l i m i t e n a b l e / f a u l t d v / d t g n d v c c v c c s o u r c e s o u r c e
mp5013 e C 5 v, 2 a , programmable current - limit switch mp5013 e rev. 1.0 www.monolithicpower.com 3 9/26/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. al l rights reserved. electrical character istics v cc = 5v, r limit = 22 , capacitive load = 10 f, t j = 25 c, unless otherwise noted. parameters symbol condition min typ max units power fet delay time dly enabl e chip to i d = 40 ma with a 5 resistive load , float dv / dt 0.2 ms on resistance r ds ( on ) t j = 85 c (5) 65 m off state output voltage v off v cc = 18v , v en = 0v , r l = 500? 120 mv thermal latch shutdown temperature (5) t sd 175 c under - (uvp) and over - voltage protection (ovp) output clamp voltage v clamp over - voltage protection , v cc = 8v 5. 5 5.7 5.9 v under - voltage lockout v uvlo rising edge 2. 5 2 . 7 2.9 v under - voltage lockout hysteresis v hyst 0. 1 3 v current limit ( 5 ) hold cur rent i lim - ss 0 short resistance , r lim = 22 2. 7 3.5 4.3 a trip current i lim - ol r lim = 22 6.5 a d v / dt circuit rise time r float dv/dt , output rises from 10% to 90% 0.84 1. 2 2.75 ms enable/fault low - level input voltage v i l output disabled 0.5 v intermediate - level input voltage v i (int) thermal fault , output disabled 0.8 2 1. 3 1.95 v high - level input voltage v ih output enabled 2.5 v high - state maximum voltage v i (max) 4.95 v pull - up current (source ) i il v enable = 0v 15 2 5 35 a maximum fan - out for enable/ fault signal maximum number of chips for simultaneous shutdown 3 units maximum voltage on enable ( e n ) ( 6 ) v max vcc v total device bias current i bias device operational 8 90 950 a enable shutdown 580 650 thermal shutdown 600 700 minimum operating voltage for under - voltage lockout v min enable < 0.5v 2.5 v note s : 5) guaranteed by characterization test . 6) maximum input voltage on enable /fault is 6 v if vcc 6v . maximum input voltage on enable /fault is vcc if vcc 6v .
mp5013 e C 5 v, 2 a , programmable current - limit switch mp5013 e rev. 1.0 www.monolithicpower.com 4 9/26/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. al l rights reserved. typical performance characteristics v in = 5v, v en = 5 v, r limit = 22 , c out = 10 f, c d v / dt = float , t a = 25c, unless otherwise noted.
mp5013 e C 5 v, 2 a , programmable current - limit switch mp5013 e rev. 1.0 www.monolithicpower.com 5 9/26/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. al l rights reserved. typical performance characteristics (continued) v in = 5v, v en = 5 v, r limit = 22 , c out = 10 f, c dv / dt = float , t a = 25c, unless otherwise noted.
mp5013 e C 5 v, 2 a , programmable current - limit switch mp5013 e rev. 1.0 www.monolithicpower.com 6 9/26/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. al l rights reserved. typical performance characteristics (continued) v in = 5v, v en = 5 v, r limit = 22 , c out = 10 f, c dv / dt = float , t a = 25c, unless otherwise noted.
mp5013 e C 5 v, 2 a , programmable current - limit switch mp5013 e rev. 1.0 www.monolithicpower.com 7 9/26/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. al l rights reserved. pin functions pin # name description 1 i - limit current limit . u s e a resistor between i - limit and source to set the overload and short circuit current - limit levels. 2 e nable/fault enable/ fault . enable/fault is a tri - state, bi directional interface. leave enable/fault floating to enable the output . pull enable/fault to ground using an open drain or open collector device to disable the output . i f a thermal fault occurs, enable/fault enters an intermediate state to signify that the device is in thermal shutdown. 3 dv/dt output voltage slew rate . the internal dv / dt circuit controls the slew rate of the output voltage during start - up . dv/dt has an internal capac itor that allows it to ramp up in 1 . 2 ms. an external capacitor can be added to dv/dt to increase the ramp time. if an additional time delay is not required , leave dv/dt open. 4 gnd ground. gnd is the int ernal ic reference. 5, 6 source source. source is the internal power fet source. source is an ic output . 7, 8 v cc input. v cc is the positive input voltage.
mp5013 e C 5 v, 2 a , programmable current - limit switch mp5013 e rev. 1.0 www.monolithicpower.com 8 9/26/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. al l rights reserved. block diagram figure 1 : functional block diagram
mp5013 e C 5 v, 2 a , programmable current - limit switch mp5013 e rev. 1.0 www.monolithicpower.com 9 9/26/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. al l rights reserved. operat ion the MP5013E limit s the inrush current to the load when a circuit card connects to a live backplane power source, thereby limiting the backplane s voltage drop and the d v/ d t of the voltage to the load. the MP5013E offers an integrated solut ion to monitor the input voltage, output voltage, output current , and die temperature while eliminat ing the external current - sense power resistor, power mosfet , and thermal sens or . under - voltage lockout (uvlo) operation if the supply (input) is below the under - voltage lockout ( uvlo ) threshold, the output is disabled, and the e nable /f ault line is driven low. when the supply rises above the uvlo threshold, the output is enabled , and e nable /f ault is pulled high through a 2 5 a current source without an external pull - up resistor . the pull - up voltage is limited to 4.9 5 v . output over - voltage protection (ovp) if the input voltage exceeds the over - voltage protection ( ovp ) threshold, the output is clamped at 5.7 v , typ ically . c urrent limit ing when the chip is active, if the load reaches the over - current protection (ocp) threshold (trip current) or a short is present, the MP5013E switches to constant - current mode (hold current) . the MP5013E shut s down only if the over - c urrent condition trigger s thermal protection. however, when the MP5013E is powered up by v cc or enable ( e n ) , the load current should be smaller than the hold current . otherwise, the part cannot be fully turned on . in a typical applic ation with a 22 ? current - limit ing resistor , the trip current is 6. 5a , and the hold current is 3.5 a . if the MP5013E is in normal operati on and pass es 2.0a , it only need s to dissipate 1 44 mw with a lo w 36 m? on resistance . for a package dissipation of 100 c/w , the temperature rise is + 14 c. given a 25c ambient temperature , the typical package temperature is 39 c. the MP5013E requires a heat sink during constant - current mode ( i.e.: from a short circuit) to prevent an unwanted shutdown . during a short - circuit condition , the MP5013E must dissipate the power from a 5 v drop . without additional heat dissipation at 100 c/ w , the temperature exceed s the thermal threshold (+175c) , and the MP5013E shut s down to force the temperature to drop . thermal protection if the temperature exceeds the thermal threshold , the MP5013E disables its output and dri ves the e nable /f ault line to mid dle ( mid ) level ( see the following enable/fault section for more detail ) . the thermal fault condition is latched, and the MP5013E remain s in a latch ed - off state until the power is restart ed or enable/fault is reset . enable /fault enable/fault is a bi directional, three - level i/o pin with a weak pull - up current ( typically 2 5 a ) . the three levels are low , mid , and high . the enable/fault functions enable or disable the MP5013E and relay fault information. when enable /fault functions as an input , l ow and m id levels disable the MP5013E . a l ow level can also clear the fault flag. a high level enables the MP5013E if the fault flag is clear . when enable /fault functions as an output , t he pull - up current allow s a wired - nor pull - up to enable the MP5013E if the current is not overridden . an under - voltage condition cause s a low level on enable/fault and clear s the fault flag. a thermal fault set s a mid level on enable/fault and set s the fault flag .
mp5013 e C 5 v, 2 a , programmable current - limit switch mp5013 e rev. 1.0 www.monolithicpower.com 10 9/26/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. al l rights reserved. the enable/fault line must remain high for the output to turn on . the fault flag is a n internal flip - flop that can be set or reset under the following condition s : ? thermal shutdown : set fault flag . ? under - voltage : reset fault flag . ? low on enable/fault : reset fault flag . ? mid on enable/fault : no effect . under thermal shutdown , enable/fault is driven to mid level . there are four types of faults . each fault has a direct and indirect effect on enable/fault and the internal fault flag (see table 1) . in a typical application , there are one or more MP5013E chips in a system. the enable/fault lines are c onnected together , typically . table 1 : fault function influence in application fault description internal action effect on enable/ fault effect on flag effect on secondary part short / over current limit current none none none under voltage output tur n s off internally drives enable/fault to logic low flag is reset disables secondary output and resets fault flag over voltage limit output voltage none none none thermal shutdown shutdown. the MP5013E is latched off or until uvlo is driven to ground externally . internally drives enable/fault to mid flag is set disables secondary part output
mp5013 e C 5 v, 2 a , programmable current - limit switch mp5013 e rev. 1.0 www.monolithicpower.com 11 9/26/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. al l rights reserved. application informat ion current limit t he current limit i s a function of the external current - limit resistor . table 2 list s some current values as a function of the resistor value. table 2 : current limit vs. current limit resistor (v cc = 5v) r limit (?) 22 51 75 100 2 2 0 trip current (a) 6.5 4.3 3.7 3.38 3 hold current (a) 3.5 1.5 1.1 0.81 0.4 r ise time t he rise time i s a function of the capacitor (c dv/dt ) on dv/dt . table 3 lists typical rise time s as a function of the capacitance. table 3 : rise time vs. c dv/dt c dv/dt none 150pf 470pf 1 nf rise time (ms) 1 .2 5.7 15.3 31.2 calculate the rise time with equation (1): (1) the rise time is measured from 10% to 90% of the output voltage (see figure 2) . figure 2 : rise tim e pcb layout guidelines efficient p cb layout is critical for stable operation. for best results, refer to figure 3 and follow the guidelines below . 1. place r limit close to i - l imit . 2. place c dv/dt close to dv/dt . 3. place the input cap acitor close to v cc . 4. place enough copper area near v cc and s ource for thermal dissipation . top layer bottom layer figure 3: recommended pcb layout design example table 4 is a design example following the application guidelines for the specifications below. table 4 : design example v in 5 v trip current 6.5 a hold curre nt 3.5 a figure 4 shows the typical application schematic . the typical performance characteristics section shows the circuit waveforms. for more device applications, please refer to the related evaluation board datasheet. 1.2ms (pf) c * 0.03ms (ms) time rise dv/dt ? ? i - l i m i t e n a b l e / f a u l t d v / d t g n d s o u r c e s o u r c e v c c v c c s o u r c e g n d c 1 c 3 c 4 r 1 c 2 v c c v c c
mp5013 e C 5 v, 2 a , programmable current - limit switch mp5013 e rev. 1.0 www.monolithicpower.com 12 9/26/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. al l rights reserved. typical application circuit figure 4 : typical application schematic v c c e n a b l e / f a u l t d v / d t g n d i - l i m i t s o u r c e v i n e n f s o u r c e 1 0 v c c v o u t c 4 n s 2 2 ? r 1 c 3 c 1 c 2 1 0 f n s 1 2 3 4 5 6 7 8 m p 5 0 1 3 e
mp5013 e C 5 v, 2 a , programmable current - limit switch notice: the information in this document is subject to change without notice. users should warrant and guarantee that third party intellectual property rights are not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mp5013 e rev. 1. 0 www.monolithicpower.com 13 9/26/2016 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. package information tsot23 - 8 front view note : 1 ) all dimensions are in millimeters . 2 ) package length does not include mold flash , protrusion or gate burr . 3 ) package width does not include interlead flash or protrusion . 4 ) lead coplanarity ( bottom of leads after forming ) shall be 0 . 10 millimeters max . 5 ) jedec reference is mo - 193 , variation ba . 6 ) drawing is not to scale . 7 ) pin 1 is lower left pin when reading top mark from left to right , ( see example top mark ) top view recommended land pattern seating plane side view detail '' a '' see detail '' a '' iaaaa pin 1 id see note 7 example top mark

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